mikecarper
df88a6ef95
Keep Full sensors, UART2, adaptive OTA storage and the 8 KiB loop stack. Arbitrate shared SPI and OTA workspace ownership, move network waits into a worker, and use bounded queued TCP operations. Add reproducible test configs, RAM checks and regression coverage. Validated the Full build, UF2 layout and 29 sanitizer runtime scenarios.
287 lines
13 KiB
Python
287 lines
13 KiB
Python
"""Run the bounded TCP sender against a register-level W5100S simulator."""
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from pathlib import Path
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import subprocess
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import tempfile
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import unittest
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ROOT = Path(__file__).resolve().parents[1]
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DRIVER = (ROOT / ".pio/libdeps/RAK_4631_repeater_unified_lora_ota"
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/ "RAK13800-W5100S/src/w5100.h")
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ARDUINO = r'''
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#pragma once
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#include <cstdint>
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constexpr unsigned OUTPUT = 1, LOW = 0, HIGH = 1;
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inline void pinMode(unsigned, unsigned) {}
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inline void digitalWrite(unsigned, unsigned) {}
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'''
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SPI = r'''
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#pragma once
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#include <cassert>
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constexpr unsigned MSBFIRST = 1, SPI_MODE0 = 0;
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struct SPISettings { SPISettings(unsigned, unsigned, unsigned) {} };
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struct SPIClass {
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bool active = false;
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unsigned begins = 0, ends = 0;
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void beginTransaction(SPISettings) { assert(!active); active = true; ++begins; }
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void endTransaction() { assert(active); active = false; ++ends; }
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};
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'''
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RAK_HEADER = r'''
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#pragma once
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#define _RAK13800_W5100S_H_
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#define MAX_SOCK_NUM 8
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#include <Arduino.h>
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#include <SPI.h>
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'''
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# Keep the production register interface available in native CI without
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# downloading board libraries. A second test uses the actual installed vendor
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# header when available, and the firmware build always checks that interface.
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PORTABLE_DRIVER = r'''
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#pragma once
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#include <Arduino.h>
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#include <SPI.h>
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#define SPI_ETHERNET_SETTINGS SPISettings(14000000, MSBFIRST, SPI_MODE0)
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struct SnSR { static constexpr uint8_t CLOSED=0, ESTABLISHED=0x17, CLOSE_WAIT=0x1c; };
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struct SnIR { static constexpr uint8_t SEND_OK=0x10, TIMEOUT=0x08; };
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enum SockCMD { Sock_CLOSE=0x10, Sock_SEND=0x20, Sock_RECV=0x40 };
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class W5100Class {
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static uint8_t chip, CH_BASE_MSB, ss_pin;
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static SPIClass* spi;
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public:
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static constexpr uint16_t SSIZE=2048, SMASK=2047;
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static uint8_t init();
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static uint8_t getChip() { return chip; }
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static SPIClass* getSPI() { return spi; }
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static void setSPI(SPIClass& value) { spi=&value; }
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static uint16_t SBASE(uint8_t socket) { return 0x4000 + socket*SSIZE; }
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static uint16_t RBASE(uint8_t socket) { return 0x6000 + socket*SSIZE; }
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static uint16_t read(uint16_t, uint8_t*, uint16_t);
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static uint16_t write(uint16_t, const uint8_t*, uint16_t);
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static uint8_t read(uint16_t address) { uint8_t value; read(address,&value,1); return value; }
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static uint8_t write(uint16_t address,uint8_t value) { return write(address,&value,1); }
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static uint16_t reg(uint8_t socket,uint16_t offset) { return (CH_BASE_MSB<<8)+socket*256+offset; }
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static uint8_t readSnSR(uint8_t socket) { return read(reg(socket,3)); }
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static uint8_t readSnIR(uint8_t socket) { return read(reg(socket,2)); }
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static uint8_t readSnCR(uint8_t socket) { return read(reg(socket,1)); }
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static void writeSnIR(uint8_t socket,uint8_t value) { write(reg(socket,2),value); }
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static void writeSnCR(uint8_t socket,uint8_t value) { write(reg(socket,1),value); }
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static uint16_t readSnTX_WR(uint8_t socket) {
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uint8_t bytes[2]; read(reg(socket,0x24),bytes,2); return (bytes[0]<<8)|bytes[1];
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}
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static uint16_t readSnTX_FSR(uint8_t socket) {
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uint8_t bytes[2]; read(reg(socket,0x20),bytes,2); return (bytes[0]<<8)|bytes[1];
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}
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static uint16_t readSnRX_RSR(uint8_t socket) {
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uint8_t bytes[2]; read(reg(socket,0x26),bytes,2); return (bytes[0]<<8)|bytes[1];
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}
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static uint16_t readSnRX_RD(uint8_t socket) {
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uint8_t bytes[2]; read(reg(socket,0x28),bytes,2); return (bytes[0]<<8)|bytes[1];
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}
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static void writeSnRX_RD(uint8_t socket,uint16_t value) {
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uint8_t bytes[2]={uint8_t(value>>8),uint8_t(value)}; write(reg(socket,0x28),bytes,2);
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}
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static void writeSnTX_WR(uint8_t socket,uint16_t value) {
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uint8_t bytes[2]={uint8_t(value>>8),uint8_t(value)}; write(reg(socket,0x24),bytes,2);
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}
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static void execCmdSn(uint8_t, SockCMD); // deliberately undefined: a blocking call fails linking
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};
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extern W5100Class W5100;
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'''
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RUNNER = r'''
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#include <cassert>
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#include <cstring>
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#include <vector>
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#include "src/helpers/nrf52/EthernetCliTransmit.h"
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using mesh::nrf52::EthernetCliTransmit;
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static_assert(Sock_SEND == 0x20 && Sock_CLOSE == 0x10 && Sock_RECV == 0x40);
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static_assert(SnIR::SEND_OK == 0x10 && SnIR::TIMEOUT == 0x08);
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static_assert(SnSR::ESTABLISHED == 0x17 && SnSR::CLOSE_WAIT == 0x1c);
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static SPIClass spi;
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uint8_t W5100Class::chip = 51, W5100Class::CH_BASE_MSB = 4, W5100Class::ss_pin = 26;
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SPIClass* W5100Class::spi = &::spi;
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W5100Class W5100;
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static uint8_t memory[65536] = {};
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static uint8_t next_chip = 51;
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static unsigned reads = 0, writes = 0, free_reads = 0, data_writes = 0, commands = 0;
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static bool short_write = false;
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static std::vector<uint16_t> changing_free;
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static std::vector<uint16_t> changing_receive;
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uint8_t W5100Class::init() { chip = next_chip; spi = &::spi; return chip; }
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uint16_t W5100Class::read(uint16_t address, uint8_t* buffer, uint16_t length) {
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assert(::spi.active); ++reads;
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if (address >= 0x400 && address < 0x800 && (address&255) == 0x20 && length == 2) {
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++free_reads;
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if (!changing_free.empty()) {
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const uint16_t value = changing_free.front(); changing_free.erase(changing_free.begin());
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buffer[0] = value>>8; buffer[1] = value; return length;
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}
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}
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if (address >= 0x400 && address < 0x800 && (address&255) == 0x26 && length == 2 &&
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!changing_receive.empty()) {
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const uint16_t value=changing_receive.front(); changing_receive.erase(changing_receive.begin());
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buffer[0]=value>>8; buffer[1]=value; return length;
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}
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memcpy(buffer,memory+address,length);
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return length;
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}
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uint16_t W5100Class::write(uint16_t address,const uint8_t* buffer,uint16_t length) {
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assert(::spi.active); ++writes;
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if (address >= 0x4000) {
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++data_writes;
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if (short_write) return 0;
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}
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if (address >= 0x400 && address < 0x800 && length == 1 && (address&255) == 2) {
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memory[address] &= ~buffer[0];
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} else {
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if (address >= 0x400 && address < 0x800 && length == 1 && (address&255) == 1) ++commands;
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memcpy(memory+address,buffer,length);
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}
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return length;
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}
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static uint16_t reg(unsigned offset) { return 0x400+offset; }
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static void put16(unsigned offset,uint16_t value) {
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memory[reg(offset)] = value>>8; memory[reg(offset)+1] = value;
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}
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static uint16_t get16(unsigned offset) { return (memory[reg(offset)]<<8)|memory[reg(offset)+1]; }
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static void reset() {
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memset(memory,0,sizeof(memory));
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memory[reg(3)] = SnSR::ESTABLISHED;
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put16(0x20,2048);
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reads = writes = free_reads = data_writes = commands = 0;
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changing_free.clear(); changing_receive.clear(); short_write = false; next_chip = 51;
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W5100.init();
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assert(!::spi.active && ::spi.begins == ::spi.ends);
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}
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int main() {
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uint8_t payload[512];
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for (unsigned i=0;i<sizeof(payload);++i) payload[i]=i;
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reset();
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EthernetCliTransmit sender;
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memory[reg(2)] = SnIR::SEND_OK; // stale ACK must be revoked
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assert(sender.write(0,payload,4,10) == 4 && sender.pending() && !sender.failed());
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assert(memcmp(memory+0x4000,payload,4)==0 && get16(0x24)==4);
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assert(memory[reg(2)]==0 && memory[reg(1)]==Sock_SEND && commands==1);
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assert(sender.write(0,payload,4,11)==0 && commands==1);
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const unsigned before=reads;
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sender.poll(12); // command/ACK remain stuck: one finite poll
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assert(sender.pending() && reads-before<=3);
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memory[reg(1)]=0; memory[reg(2)]=SnIR::SEND_OK;
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sender.poll(20);
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assert(!sender.pending() && !sender.failed() && memory[reg(2)]==0);
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assert(sender.write(0,payload,4,21)==4 && get16(0x24)==8);
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reset(); sender.reset();
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put16(0x24,0xfffe); // circular SRAM and 16-bit counter both wrap
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assert(sender.write(0,payload,4,1)==4);
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assert(memory[0x47fe]==0 && memory[0x47ff]==1 && memory[0x4000]==2 && memory[0x4001]==3);
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assert(get16(0x24)==2 && data_writes==2);
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reset(); sender.reset(); put16(0x20,32);
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assert(sender.write(0,payload,sizeof(payload),1)==32 && get16(0x24)==32);
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reset(); sender.reset(); changing_free={100,101,100,101};
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assert(sender.write(0,payload,4,1)==0 && free_reads==4 && !sender.failed());
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assert(!sender.pending() && !data_writes && !commands);
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assert(sender.write(0,payload,4,2)==4); // instability yields and retries
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reset(); sender.reset(); put16(0x20,0);
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assert(sender.write(0,payload,4,1)==0 && !sender.failed());
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assert(sender.write(0,payload,4,10000)==0 && !sender.failed()); // backpressure is not an ACK timeout
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reset(); sender.reset(); short_write=true;
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assert(sender.write(0,payload,4,1)==0 && sender.failed());
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assert(get16(0x24)==0 && commands==0);
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reset(); sender.reset();
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assert(sender.write(0,payload,4,0xfffffff0u)==4);
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memory[reg(1)]=0; // ACK never arrives; register polling stays finite
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for (unsigned elapsed=1;elapsed<250;++elapsed) {
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const unsigned first=reads;
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sender.poll(0xfffffff0u+elapsed);
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assert(sender.pending() && !sender.failed() && reads-first<=3);
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}
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sender.poll(0xfffffff0u+250);
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assert(sender.failed() && !sender.pending());
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assert(EthernetCliTransmit::close(0));
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assert(memory[reg(1)]==Sock_CLOSE);
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reset(); sender.reset(); memory[reg(1)]=Sock_SEND;
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assert(sender.write(0,payload,4,10)==0 && sender.pending() && !sender.failed());
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sender.poll(259); assert(!sender.failed());
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sender.poll(260); assert(sender.failed());
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const unsigned close_reads=reads;
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assert(!EthernetCliTransmit::close(0) && reads-close_reads==1); // stuck CR never spins
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reset(); sender.reset(); assert(sender.write(0,payload,4,1)==4);
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memory[reg(1)]=0; memory[reg(2)]=SnIR::SEND_OK|SnIR::TIMEOUT;
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sender.poll(2); assert(sender.failed() && memory[reg(2)]==0);
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reset(); sender.reset(); assert(sender.write(0,payload,4,1)==4);
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memory[reg(3)]=SnSR::CLOSED;
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sender.poll(2); assert(sender.failed());
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reset(); sender.reset(); put16(0x20,0xffff);
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assert(sender.write(0,payload,4,1)==0 && sender.failed() && commands==0);
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reset(); sender.reset();
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assert(sender.write(4,payload,4,1)==0 && sender.failed() && reads==0);
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assert(!EthernetCliTransmit::close(4));
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reset(); sender.reset(); next_chip=55; W5100.init();
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assert(sender.write(0,payload,4,1)==0 && sender.failed() && reads==0);
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reset(); sender.reset(); assert(sender.write(0,payload,4,1)==4);
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const unsigned no_io_reads=reads, no_io_writes=writes;
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sender.reset(); assert(!sender.pending() && !sender.failed());
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assert(reads==no_io_reads && writes==no_io_writes);
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reset(); sender.reset();
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assert(sender.write(0,nullptr,4,1)==0 && sender.write(0,payload,0,1)==0 && !sender.failed());
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reset();
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assert(EthernetCliTransmit::commandReady(0) && EthernetCliTransmit::connected(0));
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put16(0x26,2); put16(0x28,0xffff);
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memory[0x67ff]='X'; memory[0x6000]='Y';
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assert(EthernetCliTransmit::available(0)==2);
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assert(EthernetCliTransmit::peek(0)=='X' && get16(0x28)==0xffff && commands==0);
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assert(EthernetCliTransmit::read(0)=='X');
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assert(get16(0x28)==0 && memory[reg(1)]==Sock_RECV && commands==1);
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assert(!EthernetCliTransmit::commandReady(0)); // newly stuck RECV never spins
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const unsigned first_rx_read=reads;
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assert(EthernetCliTransmit::available(0)==0 && EthernetCliTransmit::read(0)==-1);
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assert(reads-first_rx_read<=4 && commands==1);
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memory[reg(1)]=0; put16(0x26,1);
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assert(EthernetCliTransmit::read(0)=='Y' && get16(0x28)==1);
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reset(); changing_receive={1,2,1,2};
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const unsigned before_rx_reads=reads;
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assert(EthernetCliTransmit::available(0)==0 && reads-before_rx_reads==6);
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assert(commands==0); // unstable register values yield after four reads
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memory[reg(3)]=SnSR::CLOSE_WAIT; changing_receive={1,2,1,2};
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assert(EthernetCliTransmit::connected(0)); // uncertainty must not discard final bytes
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put16(0x26,1); assert(EthernetCliTransmit::connected(0));
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put16(0x26,0); assert(!EthernetCliTransmit::connected(0));
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memory[reg(3)]=SnSR::CLOSED;
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assert(EthernetCliTransmit::available(0)==0 && EthernetCliTransmit::read(0)==-1);
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assert(!EthernetCliTransmit::connected(0));
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assert(EthernetCliTransmit::read(4)==-1 && EthernetCliTransmit::available(4)==0);
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assert(!EthernetCliTransmit::commandReady(4) && !EthernetCliTransmit::connected(4));
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assert(!::spi.active && ::spi.begins==::spi.ends);
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}
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'''
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class EthernetTransmitTest(unittest.TestCase):
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def compile_and_run(self, driver):
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with tempfile.TemporaryDirectory() as directory:
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path = Path(directory)
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for name, content in (("Arduino.h", ARDUINO), ("SPI.h", SPI),
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("RAK13800_W5100S.h", RAK_HEADER), ("w5100.h", driver)):
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(path / name).write_text(content)
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(path / "test.cpp").write_text(RUNNER)
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exe = path / "test"
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subprocess.run([
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"c++", "-std=c++17", "-Wall", "-Wextra", "-Werror", "-pedantic",
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"-I", str(path), "-I", str(ROOT), str(path / "test.cpp"), "-o", str(exe),
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], check=True)
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subprocess.run([str(exe)], check=True, timeout=5)
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def test_nonblocking_send_ring_wrap_deadlines_and_faults(self):
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self.compile_and_run(PORTABLE_DRIVER)
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@unittest.skipUnless(DRIVER.is_file(), "RAK13800 board library is not installed in this native checkout")
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def test_actual_vendor_register_header_compatibility(self):
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self.compile_and_run(DRIVER.read_text())
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if __name__ == "__main__":
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unittest.main()
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