mikecarper
e8d1e537e4
Add receive-only same-image display, SPI, modem/IQ-cache and scoped-priority experiments with checkpointed collectors. Keep rejected clock-phase correction and elevated-priority experiments out of production. Publish sanitized timing data, Full Companion/Bluetooth/USB checks and redraw measurements with their limits. Wire the new behavioral checks into CI.
20 lines
757 B
C
20 lines
757 B
C
#pragma once
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#include <stdint.h>
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// HIL-only ESP32-S3 SPI2/3 clock register experiment. Keep it independent of
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// the peripheral so every N/pre combination can be checked on the host.
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struct TDeckSpiClockTiming {
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static constexpr uint32_t ClockEqualsSource = uint32_t(1) << 31;
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static constexpr uint32_t PhaseMask = 0x0fff;
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static uint32_t corrected(uint32_t original) {
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const uint32_t n = (original >> 12) & 0x3f;
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// Source-clock mode has no divided phases. N=0 likewise cannot represent
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// both a high and a low phase; leave it untouched rather than underflow H.
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if ((original & ClockEqualsSource) || n == 0) return original;
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const uint32_t high = (n + 1) / 2 - 1;
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return (original & ~PhaseMask) | n | (high << 6);
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}
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};
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